1. Field of the Invention
The present relates generally to semiconductor MOS device fabrication. More particularly, the present invention relates to a silicide or salicide process utilizing pre-amorphization implant (PAI) and a low-temperature post-PAI annealing for repairing damage caused by the PAI.
2. Description of the Prior Art
Silicide or self-aligned silicide (salicide) process is well known in the art. FIGS. 1-4 shows a typical silicide process. As shown in FIG. 1, a gate 12 is formed on a substrate 10 with a gate oxide layer 14 interposed therebetween. An offset lining oxide layer 16 is typically formed on the sidewalls of the gate 12 and extends to the main surface of the substrate 10. A pair of silicon nitride spacers 18 is formed on the offset lining oxide layer 16. Source/drain extension regions 22 are formed directly under the silicon nitride spacers 18. After the formation of the silicon nitride spacers 18, dopants are implanted into the substrate 10 to form heavily doped source/drain regions 24.
After the formation of the heavily doped source/drain regions 24, as shown in FIG. 2, a pre-amorphization implant (PAI) 30 is then carried out to form an amorphized layer 32. PAI may be accomplished by implanting an amorphizing substance such as In or Ge into the substrate 10.
As shown in FIG. 3, a blanket metal layer 42 is then sputtered onto the substrate 10. Finally, as shown in FIG. 4, the metal layer 42 reacts with the substrate 10 and the gate 12 to form silicide layer 52. The un-reacted metal is then removed from the wafer surface by wet etching.
However, the PAI process causes damages to the surface of the substrate 10, resulting in interfacial defects 33 located at the interface between the amorphized layer 32 and the heavily doped source/drain regions 24 as specifically indicated in FIG. 2. A higher diode leakage between N+ source/drain region and P well is observed likely due to the formation of the interfacial defects 33.
In light of the above, there is a need to provide an improved method to fabricate a transistor with silicided source and drain without deteriorating the performance of the transistor.